While the industry is continuing to move forward using 3D technology in the transistor with gate all around (GAA) transistors, then several potential new technologies such as fork sheet transistors and others to move the industry closer to 1nm technology node, and potentially beyond. The 3D Era in the Front- and Back-endsįinFETs and 3DNAND further accelerated 3D in the front-end of the line. The trend continued with the introduction of the damascene process and copper, which quickly grew the back end of the line metallization from 2-3 layers into today’s interconnect skyscrapers, as shown in Figure 1. Figure 1: 3D interconnect skyscrapers – Source Intel Architecture Day 2020īuilding integrated circuits (ICs) in the third dimension has been taking place since trench capacitors were introduced for DRAM in the 1980s.
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